New logiCVC-ML IP Version Available

> 28. April 2011, Zagreb (Croatia) – logiCVC-ML IP Core now with the AMBA® AXI4 interface and the DVI output
 
 
The new Compact Multilayer Video Controller IP version supports the AMBA® AXI4 (Advanced eXtensible Interface 4) interface which allows for IP use in the latest Xilinx ISE® Design Suite 13 software and design tools.

With this Plug-and-Play IP core, designers can add an advanced display support to their new 7-Series, Virtex®-6 and Spartan®-6 FPGA design within minutes. The logiCVC-ML supports connections to different memory controllers, such as the Xilinx's axi_s6_ddrx and axi_v6_ddrx, or Xylon's logiMEM-ARB memory controller IP core.

The AMBA AXI4 interface is a configurable option and can be easily exchanged with the IBM CoreConnect PLB compatible interface.


The list of new IP features is further expanded by the DVI output option. The DVI output cuts the BOM and saves on costs by providing direct FPGA display control with no need for external display drivers. The highest display resolution supportable by the low-cost Xilinx Spartan-6 FPGA and the DVI output is 1280x1024. The IP's DVI output also supports HD 1080i and HD720p.

The logiCVC-ML Compact Multilayer Video Controller IP core is available in Xylon's Low-Volume IP Program (LVIP), which is setup to match every budget. Other licensing models, such as the Site License, are available on request.

logicBRICKS IP cores from the LVIP program are available for full evaluation at no cost and obligations.


 
The Photo Album Demo allows for browsing through photos stored on the SD card.
This demo is a quite illustrative example of LCD display control with several graphics layers. Xylon's logiCVC-ML Compact Multilayered Video Controller IP core can control up to 5 layers at once. This demo runs on the logiTAP Platform for Embedded GUI System Developments.

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