logiMEM_arb

logiMEM_arb - Can each user port, of the logiMEMarb, be configured for different bus types and different data bus widths
KBA-01053-5QD2FH
Question
Can each user port, of the logiMEMarb, be configured for different bus types and different data bus widths?
Answer
Each logiMEM_arb port has configurable data width (32, 64 and 128-bit) and each port can be configurable as AXI (AMBA AXI 4 from ARM) or as Xylon Memory Bus (XMB) for connection of various IP cores.
Additonally, two ports can be configurable as Xilinx (IBM) Coreconnect PLBv4.6 ports, two ports as Xilinx Cache Link (XCL) ports for MicroBlaze cache interface connection (32-bit) and one port can be configurable as Native Port Interface (NPI) port.
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