Xylon Image Signal Processing (ISP) Pipeline

 

Evaluate Xylon's Image Signal Processing (ISP) Pipeline IP Core designed for digital processing and image quality enhancements of an input video stream in Smarter Vision embedded designs based on Xilinx All Programmable. The design contains everything you need to immediately start evaluating and working with the Xylon ISP pipeline: the SoC design including evaluation logicBRICKS IP cores, hardware design files, documentation and the GUI-based demo application (Linux OS, Qt GUI).

Xylon Image Signal Processing (ISP) demo runs on the Xilinx Zynq®-7000 All Programmable SoC based MicroZed™ Embedded Vision Kit from Avnet Electronics Marketing.

The original demo resolution is 1080p60. The presented compressed video has been captured by the frame grabber at 30fps.

To learn more and download for free - CLICK HERE!

 

Xylon Image Signal Processing (ISP) demo runs on the Xilinx Zynq®-7000 All Programmable SoC based MicroZed™ Embedded Vision Kit from Avnet Electronics Marketing. Xylon provides another Smarter Vision free reference design for the same hardware platform - Face Detection and Tracking. To learn more about this demo, please CLICK HERE.






Xilinx Alliance UltraFast Certified

Copyright © 2017 Xylon d.o.o.