Xilinx Base TRD ported to the ZedBoard

Xylon has adopted* the Xilinx® Base Targeted Reference Design (TRD) for the Zynq®-7000 All Programmable SoC ZC702 Evaluation Kit for use with the ZedBoard™ from Avnet Electronics Marketing. The Base TRD design for the ZedBoard is available for download from HERE!

Currently available design is prepared for Xilinx Vivado® Design Suite 2014.4.

Xilinx Base TRD for the Zynq-7000 All Programmable SoC ZC702 Evaluation Kit performs video processing on the 1080p@60fps HD video stream captured through the video input FMC daughter-card. The Base TRD integrates Xylon's logiCVC-ML display controller IP core.


Xilinx Base TRD ported to the ZedBoard from Avnet Electronics Marketing

This design clearly demonstrates the acceleration potentials of the Zynq-7000 AP SoC by running the same Sobel Edge Detection algorithm on the ARM® processors and the programmable logic. While a software implementation of the Sobel edge detection algorithm drops frames because it cannot keep up with the frame rate, hardware implementation of the algorithm is able to keep up and smoothly process 1080p@60 HD video. A graphical user interface implemented using QT libraries enables an easy demo control and system information view.

To learn more about Xilinx Base TRD, please visit Xilinx web site:

Read More:

- Design Requirements
- Quick Start with the Reference Design
- Why Xylon's Display Controller IP core is a good fit?

* Xylon distributes the Xilinx Base TRD for the ZedBoard from Avnet Electronics Marketing with permission from Xilinx, Inc.
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