The logiMEM_arb supports total of 16 ports. Each port can be configured as either XMB (Xylon Memory Bus) or AXI4. Two ports can optionally be configured as fully compliant Xilinx PLBv4.6, while another two can be configured as fully compliant Xilinx Cache Link (XCL) ports. Additionally, there is Xilinx Native Port Interface (NPI) support on one of the ports. |