IP Cores

Compact Multilayer Video Controller

Advanced Display Controller for TFT LCD displays with resolutions up to 2048x2048, optimized for AMD Zynq™ 7000 AP SoC and FPGA implementations. Xylon provides software drivers for use with Linux®, Android™ and Microsoft® Windows® Embedded Compact 7.

• 2,220 EUR - 1 year license
• 4,000 EUR - 2 years license
• 5,330 EUR - 3 years license

Versatile Video Input

This IP core enables an easy implementation of high performance frame grabbers in AMD FPGA. The logiWIN supports real-time video processing and assures high picture quality.

• 2,220 EUR - 1 year license
• 4,000 EUR - 2 years license
• 5,330 EUR - 3 years license

MultiView 3D Video Transformation Engine

Video and image processing logicBRICKS IP core for image compensation of fish eye lens distortions, arbitrary homographic transformations, video texturing on curved surfaces and image stitching of multiple video inputs.

Image Signal Processing (ISP) UltraHD Pipeline

Ultra High Definition (including 4K2Kp60) video ISP pipeline designed for digital processing and image quality enhancements of video inputs in embedded designs based on AMD Zynq™ UltraScale+™ MPSoC, Zynq™ 7000 AP SoC, Series 7 and newer FPGA devices.

High Dynamic Range (HDR) Pipeline

Ultra High Definition (UHD, including 4K2Kp60) HDR pipeline for camera image quality enhancements. Enables extraction of the maximum detail from high-contrast scenes, i.e. scenes with objects highlighted by a direct sunlight and objects placed in extreme shades.

Scalable 3D Graphics Accelerator

3D Graphics Accelerator for AMD Versal™ Adaptive SoC, AMD Zynq™ 7000 SoC and FPGAs designed to support industry standard API.

DDR3 SDRAM Memory Controller

The logiMEM is a size optimized, flexible, parametric and synthesizable Synchronous DRAM Controller that supports industry standard Double Data Rate 3 (DDR3) SDRAM memories on AMD Series 7 FPGAs/SoCs.

• 3,540 EUR - 1 year license
• 6,380 EUR - 2 years license
• 8,500 EUR - 3 years license

Slave HSSL Controller

Supports the Infineon High Speed Serial Link (HSSL) and enables developers to combine functional safety and security provided by microcontrollers of Infineon's AURIX™ family (TC2xx and TC3xx) with the wide range of possibilities brought by AMD programmable devices.

ACAP HDR Image Signal Processing Framework

The logiREF-ACAP-VDF "ACAP IP Framework for Multi-Camera Vision Applications" enables Xylon logiVID-ACAP-6CAM ACAP Vision Development Kit users to quickly utilize the provided hardware platform for the development of AMD Versal™ Adaptive Compute Acceleration Platform (ACAP) based embedded multi-camera vision systems.

Video Design Framework for Multi-Camera Vision Applications

The complete IP design framework for use with the Xylon logiVID-ACAP-6CAM vision kit prepared for the AMD Versal™ Adaptive Soc VCK190 Evaluation Kit. Pre-verified camera-to-display & LIDAR visualization reference design significantly saves the design time and allows users to focus on specific vision-based parts of their next AD/ADAS, machine vision, guided robotics, or other vision application.

logiREF-DFX-IDF Dynamic Function eXchange with Isolation Design Flow

The complete video design framework to explain and demonstrate the AMD Dynamic Function eXchange (DFX). DFX enables features swapping by reconfiguring parts of a continually operating programmable FPGA/SoC chip.

HDR ISP framework for multi-camera applications

logicBRICKS ISP IP cores enable parallel processing of multiple Ultra HD video inputs in different AMD devices, ranging from the small AMD Artix™ FPGAs to the latest AMD Versal™ Adaptive Computing devices.

MPSoC IP Framework for Multi-Camera Vision Applications

The complete IP design framework for use with the Xylon logiVID-ZU vision kit based on the AMD Zynq™ UltraScale+™ MPSoC. Pre-verified camera-to-display reference designs significantly save the design time and allows users to focus on specific vision-based parts of their next AD/ADAS, machine vision, guided robotics, or other vision application.

Lossless MJPEG Decoder

The logiJPGD-LS Motion JPEG (MJPEG) Lossless Decoder is a "Annex H of the ISO/IEC 10918-1 JPEG" compliant IP core for still image and video decompression applications on AMD MPSoC, SoC, and FPGA devices.

Lossless MJPEG Encoder

The logiJPGD-LS Motion JPEG (MJPEG) Lossless Encoder is a "Annex H of the ISO/IEC 10918-1 JPEG" compliant IP core for still image and video compression applications on AMD MPSoC, SoC, and FPGA devices.

Multi-Channel MJPEG Decoder

JPEG standard Baseline DCT compliant decoder IP core for still image and video decompression applications on AMD All Programmable SoC and FPGA devices. This IP core is specially designed for video over IP applications and can simultaneously process up to four HD video inputs.

Motion JPEG Encoder

JPEG standard Baseline DCT compliant encoder IP core for still image and video decompression applications on AMD All Programmable SoC and FPGA devices.

SD Card Host Controller

The SD Card Host controller IP core that adds mass storage capabilities to AMD FPGA designs. Deliverables include the FileSystem and full Linux OS support.

• 4,360 EUR - 1 year license
• 7,850 EUR - 2 years license
• 10,460 EUR - 3 years license

Programmable Clock Generator

The logiCLK logicBRICKS IP core for AMD Zynq™ 7000 All Programmable SoC and FPGAs provides frequency synthesis, clock network deskew, and jitter reduction. It has twelve independent and fully configurable clock outputs. Six clock outputs are dynamically reconfigurable by mean of the Dynamic Reconfiguration Port (DRP) and can change the frequency and other clock parameters while the design is running.

• 720 EUR - 1 year license
• 1,300 EUR - 2 years license
• 1,730 EUR - 3 years license

I2C Bus Master Controller

The logiI2C is Xylon logicBRICKS IP core for AMD FPGAs and Zynq™ 7000 SoCs that meets the I2C serial bus specification.

• 1,020 EUR - 1 year license
• 1,840 EUR - 2 years license
• 2,450 EUR - 3 years license

Audio I2S Transmitter/Receiver

The logiI2S is Xylon logicBRICKS IP core for AMD FPGAs and AMD Zynq™ 7000 , compatible with the Inter-IC sound (I2S) serial bus standard for interconnection of digital audio devices.

• 780 EUR - 1 year license
• 1,410 EUR - 2 years license
• 1,880 EUR - 3 years license

SPI to AXI4 Controller Bridge

The logiSPI enables easy inter-chip board-level interfacing between virtually any microcontroller (MCU) and AMD FPGA and Zynq™ 7000 All Programmable SoC through the Serial Peripheral Interface (SPI) bus.

• 780 EUR - 1 year license
• 1,410 EUR - 2 years license
• 1,880 EUR - 3 years license

LIN Capable UART

A programmable UART, which enables automotive Electronic Control Units (ECU) to communicate within the vehicle through the Local Interconnect Network (LIN).

• 600 EUR - 1 year license
• 1,080 EUR - 2 years license
• 1,440 EUR - 3 years license

Bit Block Transfer 2D Graphics Accelerator

2D graphics accelerator that tremendously lowers a burden on the system's CPU and enables generation of attractive and effective computer graphics by AMD FPGAs and Zynq™ 7000 AP SoC.

• 2,900 EUR - 1 year license
• 5,220 EUR - 2 years license
• 6,960 EUR - 3 years license

Bitmap 2.5D Graphics Accelerator

This graphics accelerator, optimized for AMD FPGAs, speeds up operations with bitmaps. Its perspective correct renderings enable 2.5D graphics scenes rendering.

• 3,200 EUR - 1 year license
• 5,760 EUR - 2 years license
• 7,680 EUR - 3 years license

Color Camera Sensor Bayer Decoder

The logiBAYER IP core converts an input video captured by camera CMOS sensors with Bayer filter, and converts the monochrome Bayer video to full-color RGB video in real time.

• 2,220 EUR - 1 year license
• 4,000 EUR - 2 years license
• 5,330 EUR - 3 years license

Lane Marking Detector

Fundamental building block for FPGA based automotive Rear Looking Lane Departure Warning Systems.

Camera Sub-LVDS Receiver

Enables easy Sub-LVDS differential interfacing of ultra high resolution Sony CMOS image sensors to image signal processing pipelines and application processors implemented in AMD All Programmable devices.

Driver Drowsiness Detector

Computer vision IP core that detects driver drowsiness and distraction based on facial movements monitored through a camera placed in a vehicle cabin. Designed and optimized for the AMD Zynq™ 7000 All Programmable SoC.

Face Detector and Tracker

Configurable face tracking engine that finds and tracks the face and facial features in video sequences in real-time and returns full 3D head pose, gaze direction, facial features coordinates and a wealth of other information. The logiFDT is optimized for the AMD Zynq™ 7000 All Programmable SoC.

Media Local Bus Interface

Adds MOST® (Media Oriented System Transport) connectivity to AMD FPGAs and enables an efficient transport of multimedia data to/from the automotive infotainment backbone.

CAN 2.0B Compatible Network Controller

CAN 2.0B compatible network controller. Designed and optimized for AMD FPGAs, this IP core can be easily implemented by AMD development tools in any design.

• 2,580 EUR - 1 year license
• 4,650 EUR - 2 years license
• 6,200 EUR - 3 years license

Stepper Motors Controller

The logiSTEP is a stepper motor controller especially designed for automotive applications. A single logiSTEP instance in the AMD FPGA can drive up to 16 motors at once.

Object Detector

Advanced HOG/SVM object classification core for Multi-Object Detection in camera-based video systems.

SDRAM Memory Controller and Arbiter

The logiMEM_arb Memory Controller and Arbiter IP core is specially designed for AMD Spartan™ 6 FPGA memory interfaces. This IP core supports up to 16 IP ports, up to 8 simultaneous IP memory accesses and different on-chip bus standards: AMBA® AXI4, CoreConnect PLB, AMD Cache Link, AMD Native Port Interface and Xylon Memory Bus (XMB)

• 1,020 EUR - 1 year license
• 1,840 EUR - 2 years license
• 2,450 EUR - 3 years license

Vehicle Detector

Advanced object classification core for support of Vehicle Detection in camera-based video systems

Audio Infrared Digital FM Modulator

The logiAIR is a very compact Xylon IP core that enables an easy IR wireless stereo audio broadcast. The IP core's output is compatible with industry standard wireless IR headphones.

Remote Controller Receiver

The logiRC logicBRICKS IP core for AMD FPGA supports Man Machine Interfaces (MMI) controlled by standard IR remote controllers.

Pedestrian Detector

Advanced HOG/SVM object classification core for support of Pedestrian Detection in camera-based video systems.