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CAN 2.0B Compatible Network Controller
Key Features
- Compliant with the CAN 2.0B network protocol
- Deliverables include a number of CAN node licenses
- Supported baud rates up to 1 Mbit/sec
- Frames retransmission can be switched off
- Interrupt processing for all errors and messaging
- Up to 15 TX and up to 31 RX buffers in a single Block RAM
- Separated global masking feature and frame type recording for Standard and Extended CAN messages
- Requires an external CAN bus transceiver
- Fully embedded into Xilinx® Platform Studio and the EDK
Description
The logiCAN core provides all features expected from the standard CAN network controller: global masking (acceptance filtering), with separated masks for the Standard and Extended CAN frames, fault confinement, stuff bit generation, CRC and arbitration handling. Like the other Xylon's logicBRICKSTM IP cores, it is designed and optimized for the Xilinx FPGAs. This core handles messages in a highly automated way that decreases the CPU overhead, which is extremely important for efficient low-cost embedded systems. The core is fully embedded into Xilinx Platform Studio and EDK tools, and its integration with on-chip CoreConnect buses is very simple. Parametrizable VHDL design allows tuning of slice consumption and features set through an easy-to-use GUI interface.
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