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The following block diagram presents the reference FPGA design
(controller) which is used with the logiVIEW-SVK Surround View DA Development Platform. It is designed using Xylon logicBRICKS IP cores and
prepared for use with the Xilinx® Spartan-6 FPGAs. The reference design is fully compatible with Xilinx Platform Studio (XPS) and the EDK implementation tools.
The Surround View Reference FPGA - An Example Implementation
(Click To Enlarge!)
The reference design includes the Xilinx MicroBlaze™ soft-CPU, and does not require an external host processor for system control. The reference design fits into the Xilinx Spartan-6 XC6LX45T FPGA chip, with some free FPGA resources for further design expansions. The presented FPGA design is an sample implementation which can be altered to better suit special system requirements, for example the MicroBlaze soft-CPU can be exchanged with an external processor using the Spartan-6 FPGA as an image co-processor, LVDS inputs can be exchanged by CVBS or Ethernet inputs, etc.
The FPGA controls the video cameras through the I2C serial bus. The LVDS deserializers, placed on the logiFMC-FPD-II FMC daughter card, supply Bayer coded video streams captured by the cameras and sent through the National Semiconductor® FPD-Link II LVDS serial interface. The logiBAYER Color Camera Sensor Bayer Decoder IP cores placed at each video input convert video in the RGB format and store it in external DDR3 SDRAMs. The FPGA design can be changed to support other camera interfaces, such as the Ethernet, CVBS, etc.
Xylon offers FPGA design services and can make design
changes on request!
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The logiVIEW Perspective Transformation and Lens Correction Image Processor IP core is the key IP core for the design of the Surround View DA and similar multi-camera systems. This IP core removes fish eye lens distortions, makes perspective corrections to all camera video inputs and stitches the resulting single image in real-time.
A programmable homographic transformation matrix enables different perspective transformations, such as rotating, resizing, translating, cropping, as well as simultaneous combinations of all of these transformations. The time needed for full video corrections of all 4 video inputs is shorter than duration of a single camera’s frame!
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The logiVIEW IP core can be successfully used in other
applications, such as medical endoscopes, pipe inspection
systems, surveillance systems, heads-up displays (HUD), etc.
The logiMEM memory controller supports DDR3 access rate of 800Mbps and an overall memory bandwidth of 1.6 GBytes/sec achievable by the provided logiVIEW-SVK hardware. The FPGAs can support faster memory interfaces and higher memory bandwidths. Non-volatile NOR flash memory stores the application code and graphics elements for menus.
The presented FPGA SoC architecture can be changed in any feasible
way to support the requirements of particular applications. Please contact Xylon if
your application requires design changes.
Xylon logicBRICKS IP cores are compatible with Xilinx
Platform Studio and the EDK tools. FPGA designers can setup logicBRICKS
and Xilinx IP cores through GUI implementation tools, optimize feature
sets and control the utilization of FPGA resources, and in a drag &
drop fashion, implement Xilinx SoCs without hand coding.
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VIDEO - Xylon Surround View DA Demo!
Read More:
- Xylon Surround View DA Solutions - Introduction
- Xylon logiVIEW-SVK Development Platform and Toolset for Surround View DA Developments
- The logiVIEW-SVK Development Platform Package
- Xylon Calibration Software for Surround View DA (Lens + Vehicle calibration)
- Xylon Test Vehicle
- Xylon Roadmap for Surround View DA Solutions
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Read More
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