Surround View DA Reference FPGA Design

The following block diagram presents the reference FPGA design (controller) which is used with the logiVIEW-SVK Surround View DA Development Platform. It is designed using Xylon logicBRICKS IP cores and prepared for use with the Xilinx® Spartan-6 FPGAs. The reference design is fully compatible with Xilinx Platform Studio (XPS) and the EDK implementation tools.


The Surround View Reference FPGA - An Example Implementation
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The reference design includes the Xilinx MicroBlaze™ soft-CPU, and does not require an external host processor for system control. The presented FPGA design is an sample implementation which can be altered to better suit special system requirements, for example the MicroBlaze soft-CPU can be exchanged with an external processor using the Spartan-6 FPGA as an image co-processor, LVDS inputs can be exchanged by CVBS or Ethernet inputs, etc.

The FPGA controls 4 HD automotive imagers (cameras) and accepts video data from the imagers through LVDS serial link. The logiWIN Versatile Video Input IP core formats input video streams and stores video frames in dedicated buffers implemented in external DDR2 memory. Synchronization mechanisms between all IP cores assures a flicker-free video image.

All IP cores shares a common external memory bank, controlled by the logiMEM_arb memory controller. The memory controller can be programmed in different ways to assure the highest possible memory bandwidth utilization and optimal prioritization between memory requests from different IPs.

The system uses the Secure Digital (SD) card as non-volatile memory controlled by the logiSDHC Host Controller IP core.

The logiVIEW Perspective Transformation and Lens Correction Image Processor is the key IP core. It processes all video inputs within a single video frame. It removes fish-eye lens distortions and than executes the programmed perspective transformations. The transformed data is further stored in video memory buffers dedicated to the logiCVC-ML Compact Multilayer Video Controller. The logiCVC-ML IP core stitches processed images from all cameras into a single image display.

Xylon offers FPGA design services and can make design changes on request!

The presented FPGA SoC architecture can be changed in any feasible way to support the requirements of particular applications. Please contact Xylon if your application requires design changes.

Xylon logicBRICKS IP cores are compatible with Xilinx Platform Studio and the EDK tools. FPGA designers can setup logicBRICKS and Xilinx IP cores through GUI implementation tools, optimize feature sets and control the utilization of FPGA resources, and in a drag & drop fashion, implement Xilinx SoCs without hand coding.


VIDEO - Xylon Surround View DA Demo!

Read More:


- Xylon Surround View DA Solutions - Introduction
- Xylon logiVIEW-SVK Development Platform and Toolset for Surround View DA Developments
- The logiVIEW-SVK Development Platform Package
- Xylon Calibration Software for Surround View DA (Lens + Vehicle calibration)
- Xylon Test Vehicle
- Xylon Roadmap for Surround View DA Solutions
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