Reference logicBRICKS Designs

Xylon demo - Multi-Camera Vision Design Framework 
 logiADAK-VDF-ZU Reference Design (September 2017 - NEW!)

MPSoC Video Design Framework for Multi-Camera Vision Applications


Complete camera-to-display reference MPSoC designs and provided Linux demo apps enable quick utilization of the logiVID-ZU HW kit. The framework, which can be fully controlled through the Xilinx SDSoC Development Environment, enables system designers to jumpstart their next embedded vision design on the Xilinx Zynq UltraScale+ MPSoC and to focus on vision specific parts.

Evaluation HW Platform: Xylon logiVID-ZU Kit (Xilinx ZCU102 based)



Xylon demo - Multi-Camera Vision Design Framework 
 logiADAK-VDF Reference Design (July 2017 - NEW!)

Video Design Framework for Multi-Camera Vision Applications


Enables Xylon kit users to quickly utilize the provided hardware platform for development of multi-camera computer vision systems. The framework includes pre-verified logicBRICKS designs for video capture from Xylon cameras or the HDMI video input, and the display output with the RGB overlay under the Linux operating system running on the Xilinx Zynq-7000 All Programmable SoC.

Evaluation HW Platform: Xylon logiVID-Z and logiADAK Kits



Xylon demo - using HDL IP core as a C-function in the Xilinx SDSoC Environment 
 logiREF-SDSoC-FACE-EVK Reference Design (July 2015)

Xylon Demo for Xilinx SDSoC™ Development Environment - Face Detection and Tracking


This free reference design demonstrates how to use an existing HDL IP core as a callable C-function in the Xilinx SDSoC Development Environment. In order to demonstrate this procedure,  Xylon provides all necessary SDSoC files, including the SDSoC platform prepared for the MicroZed™ Embedded Vision Kit from Avnet Electronics Marketing.

Evaluation HW Platform: MicroZed Embedded Vision Kit from Avnet Electronics Marketing



Image Signal Processing (ISP) Pipeline for Xilinx Zynq-7000 AP SoC and 7 Series FPGA 
 logiREF-VIDEO-ISP-EVK Reference Design

Image Signal Processing (ISP) Pipeline for Xilinx® Zynq®-7000 AP SoC and 7 Series FPGAs


Evaluate Xylon's Image Signal Processing (ISP) Pipeline designed for digital processing and image quality enhancements of an input video stream in Smarter Vision embedded designs based on Xilinx All Programmable. The design contains everything you need to immediately start evaluating and working with the Xylon ISP pipeline: the SoC design including evaluation logicBRICKS IP cores, hardware design files, documentation and the GUI-based demo application (Linux OS).

Evaluation HW Platform: MicroZed Embedded Vision Kit from Avnet Electronics Marketing



Face Detector and Tracker for Xilinx Zynq-7000 AP SoC 
 logiREF-FACE-TRACK-EVK Reference Design

Face Detection and Tracking for Xilinx® Zynq®-7000 AP SoC


This free design demonstrates real-time face and facial features tracking in video sequences from a camera. It contains everything needed for an immediate start  with Xylon's face tracking solution designed for the Xilinx Zynq-7000 AP SoC: hardware design including evaluation logicBRICKS IP cores and hardware design files, software drivers, demo application and documentation.

Evaluation HW Platform: MicroZed Embedded Vision Kit from Avnet Electronics Marketing




Multimedia controller for Xilinx Zynq-7000 AP SoC 
 logiREF-MEDIA-ZED Reference Design (September 2015)

Multimedia Controller for Xilinx® Zynq®-7000 AP SoC


This free design shows how to use logicBRICKS IP cores for multimedia processing under the Linux operating system running on the Xilinx® Zynq®-7000 AP SoC. Demonstrated features include: video frame grabbing, audio recording and playback, and the graphics HMI design. Design deliverables include V4L2, ALSA, framegrabber and other standard Linux drivers.

Evaluation HW Platform: ZedBoard Kit + FMC-IMAGEON board from Avnet Electronics Marketing




Graphics Processing Unit (GPU) for Xilinx Zynq-7000 AP SoC 
 logiREF-BTRD-ZED Reference Design (March 2015)

Xilinx Base TRD for the ZC702 ported to the ZedBoard Kit
*

Ported Xilinx Base Targeted Reference Design (TRD) showcases real-time edge detection (Sobel filters) on live video stream and other features and capabilities of the Zynq-7000 AP SoC

* Distributed with permission from Xilinx, Inc.

Evaluation HW Platform: ZedBoard from Avnet Electronics Marketing



Graphics Processing Unit (GPU) for Xilinx Zynq-7000 AP SoC 
 logiREF-ZGPU-ZED Reference Design (April 2015)

Graphics Engine for the ZedBoard™


Evaluate Xylon's 2D and 3D logicBRICKS Graphics Processing Unit (GPU) for Xilinx Zynq-7000 All Programmable SoC on the ZedBoard development kit with a connected PC monitor. Deliverables include complete software support for Linux OS: FrameBuffer driver, Qt support and OpenGL® ES* 1.1. Configurable IP cores enable customization of the evaluation hardware and development of graphics engines tuned for specific application.

Evaluation HW Platform: ZedBoard from Avnet Electronics Marketing



Graphics Processing Unit (GPU) for Xilinx Zynq-7000 AP SoC 
 logiREF-ZGPU-ZC702 Reference Design (April 2015)

Graphics Processing Unit (GPU) for Xilinx® Zynq®-7000 AP SoC


Evaluate 2D and 3D logicBRICKS graphics on Xilinx ZC702 Evaluation Board with connected PC monitor. Deliverables include complete software support for Linux OS, from the basic FrameBuffer, Qt and up to the full OpenGL® ES* 1.1. Configurable IP cores enable customization of the evaluation hardware, which can be also used with other popular operating systems.

Evaluation HW Platform: Xilinx ZC702 Evaluation Board




Graphics Processing Unit (GPU) for Xilinx Zynq-7000 AP SoC 
 logiREF-ZGPU-ZC706 Reference Design (April 2015)

The World's Fastest 3D Graphics Engine for Xilinx® Zynq®-7000 AP SoC


Evaluate 2D and 3D logicBRICKS graphics on your Xilinx Zynq-7000 ZC706 Evaluation kit. The demo is implemented by evaluation logicBRICKS IP cores and runs Linux OS. All used IP cores, software drivers, libraries and applications are available for full evaluation.

Evaluation HW Platform: Xilinx ZC706 Evaluation Board




Graphics Processing Unit (GPU) for Xilinx Zynq-7000 AP SoC 
 logiREF-VROT-FMC Reference Design

Real-time Video Rotation for Xilinx® Zynq®-7000 AP SoC


Built with standard evaluation logicBRICKS IP cores, this demo showcases real-time low latency video input rotation. Graphic touchscreen HMI allows for dynamic changes of an angle of rotation in sub-degree steps. The video rotation works with no help from the processing system and can be also used in Xilinx FPGAs. Download a free demo and try it on your development kit!

Evaluation HW Platform: ZedBoard™ (Rev C) + FMC-HMI card (Rev B)




Graphics Processing Unit (GPU) for Xilinx Zynq-7000 AP SoC 
 logiREF-DISP-MicroZed Reference Design

Touchscreen HMI for the MicroZed™ Kit


Run the MicroZed™ evaluation kit as a Linux-based System-on-Module (SOM), which is connected to an I/O Carrier Card and the 7-inch Zed Touch Display Kit. The demo showcases Linux ilixi application launcher for several DirectFB and Qt graphics applications controlled by the capacitive touchscreen.

Evaluation HW Platform: MicroZed from Avnet Electronics Marketing




Graphics Processing Unit (GPU) for Xilinx Zynq-7000 AP SoC 
 logiREF-ZHMI-FMC Reference Design (SUPPORT HAS ENDED)

Human Machine Interface (HMI) for Xilinx® Zynq®-7000 AP SoC


Demonstration of common HMI features: video image capture, touch display control, audio and graphics display. HMI features are supported by the FMC-HMI peripheral board with an integrated high-resolution LCD display, which plugs into Xilinx ZC702 evaluation board. Deliverables include Linux OS software drivers and demo applications. Xylon supports other operating systems.

Evaluation HW Platform: Xilinx ZC702 Evaluation Board + FMC-HMI card (Rev B)



* Product is based on a published Khronos specification, and is expected to pass the Khronos Conformance Testing Process. Current conformance status can be found at www.khronos.org/conformance.
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