The Key IP Core and Video Rotation SoC Design Details

logiVIEW IP core powers the video rotation demo
logiVIEW Perspective Transformation and Lens Correction Image Processor is the key IP core for the real-time low latency video rotation demo. The video rotation is just one of many supported homographic and non-homographic video transformations that can be executed simultaneously on multiple video inputs. Processing at the pixel level assures the highest video output quality.

The maximum achievable performance depends on overall SoC architecture, video transformations, underlaying silicon, memory subsystem, etc. The presented demo setup, which has a video input resolution limited by the available video camera imager, enables smooth rotations of video inputs with 720p and slightly higher video resolutions. Full HD (1080p) and higher resolutions can be supported by two or more logiVIEW instances working in parallel.

The logiVIEW IP core is used in Xylon's solutions for automotive driver assistance, 360 Panoramic Camera for surveillance and defense, head-up displays, sensor fusion applications...

logiVIEW Key Features:
  • Designed and optimized for Xilinx® Zynq™-7000 All Programmable SoC and FPGAs
  • Configurable number of video inputs and outputs with up to 2048x2048 resolutions
  • Homography transformations in arbitrary combinations: cropping, resizing, rotating, translating
  • Video texturing on curved planes by memory look-up tables (MLUT) - non-homography
  • Lens distortion corrections suitable for extreme wide-angle lenses (fish-eye)
  • Calibration SW for lens and perspective transformation and full automotive Surround View DA
  • All video inputs may have individually setup lens correction and video transformation
Video Rotation SoC Architecture:

 Block diagram of logicBRICKS HMI for Xilinx Zynq-7000 EPP
Click To Enlarge!
The logiREF-VROT-FMC reference design is designed by off-the-shelf evaluation logicBRICKS IP cores. The logiWIN Versatile Video Input frame grabber controller takes the input video coming from the camera imager and stores the video in DDR3 memory. The rotation algorithm requires a storage of one full video input frame. The logiVIEW Perspective Transformation and Lens Correction Image Processor fetches the stored video frame, rotates it on the fly and streams towards the logiCVC-ML Compact Multi-layer Video Controller display controller IP core with blending features.
A small sync buffer between the logiVIEW and the logiCVC-ML IP cores converts tile rendered into a line rendered video output suitable for the LCD display. The touchscreen is controlled by on-chip Xilinx XADC analog to digital converters. The ARM® CPU renders and controls a simple HMI which is overlaid over the rotated display output and calculates rotation matrices programmed in the logiVIEW during blanking intervals. The HMI and the rotated video are rendered on different graphics layers, which are pixel blended by the logiCVC-ML display controller.
 
Get the precompiled SD card image and run the low latency video rotation on your development kit!

Customers interested in receiving full SoC design with evaluation logicBRICKS IP cores must send request from a valid company email address. Please send your requests to info@logicbricks.com.
Xylon reserves the right to decline evaluation requests for this reference design.

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