IP Cores - logiCVC-ML

Compact Multilayer Video Controller

Key Features

  • Try Before Buy - No cost and no obligation!
  • Supports Xilinx® Zynq®-7000 AP SoC and all FPGAs
  • Supports up to 8 individual I2S instances with the following features:
  • - Configurable as receiver or transmitter
    - Configurable as clock master or slave

    - Configurable as word select master or slave
    - Justification modes: normal, left and right
    - Config. TX/RX FIFO depth (512-4096 samples)
    - Supports word length up to 16 bits
  • ARM® AMBA® AXI4-Lite bus compliant
  • Fully embedded into Xilinx® Vivado® IPI and XPS
  • Available Linux ALSA driver

Get free logicBRICKS reference designs and evaluate this IP core on Xilinx Zynq-7000 ZC702 Evaluation Board.


The logiI2S is Xylon logicBRICKS IP core compatible with the I2S electrical serial bus interface standard used for connecting digital audio devices. This IP core enables an easy interconnection of external audio devices to the Xilinx Zynq-7000 All Programmable SoC and FPGAs that can generate or transform the digital audio data. The logiI2S IP core is fully embedded into Xilinx Vivado IP Integrator (IPI) and ISE Platform Studio (XPS), and can be easily customized and tuned for optimal slice consumption and features set. This IP core allows for an easy audio integration into Xilinx FPGA based embedded systems. Xylon provides a free reference design (logiREF-ZHMI-FMC), which includes this IP core, for the Xilinx Zynq-7000 ZC702 Evaluation Board + FMC-HMI board. This design exercises audio subsystem on Xilinx ZC702 development board and demonstrates the logiI2S functionality. Xylon maintains and distributes the open-source Linux ALSA software driver for the logiI2S IP core.
NameLicensePrice (EUR)  
logiCVC-ML 1 year license 1,850.00
logiCVC-ML 2 years license 3,330.00
logiCVC-ML 3 years license 4,440.00
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