The provided reference FPGA designs are implemented by logicBRICKS Evaluation IP Cores
and provided as royalty free reference designs enabling FPGA users to
build companion chip solutions in a cost effective manner. The reference designs users must have valid licenses**
for Xilinx development tools. The logiPCIECTRL* PCIe Companion Chip Controller IP core for bridging between the Xilinx® Spartan®-6 FPGA hard PCIe endpoint and the PLB bus is provided as the VHDL source code.
The USB reference design implements evaluation version of the Xilinx® USB2 IP core. For use in developed products, users must purchase the valid licenses** from Xilinx. Xylon provides free USB firmware that works with the Xilinx USB2 IP core and runs on the Xilinx MicroBlaze™ CPU implemented in the FPGA.