IP Cores - logiPDET (OBSOLETE!)

Pedestrian Detector

Key Features

  • Advanced HOG/SVM object classification core for support of Pedestrian Detection in camera-based video systems
  • Supports Xilinx® Zynq®-7000 All Programmable SoC
  • ARM® AMBA® AXI4-Stream compliant video input
  • AXI4-Lite compliant registers interface
  • Supports resolutions up to 1024x1024
  • Support for multiple scale detection
  • Run-time variable image size
  • High Input Data Rate; > 120 Mpixel/sec
  • High Throughput; >7.6 GMAC/sec for the classification stage
  • Low latency (< 8 lines)
  • Classifier trained on wide range of automotive scenarios
  • Prepackaged for Xilinx Vivado® Design Suite
  • If you are interested in FPGA implementation, please contact Xylon

This is an obsolete IP core replaced by the logiHOG Objects Detector!

Description

The logiPDET block is an HOG/SVM-based pedestrian detection IP core, developed for vision-based embedded applications, from the Xylon logicBRICKS IP core library. The algorithm follows a discriminative approach. It combines a HOG-based descriptor and a SVM classifier. HOG (Histogram of Oriented Gradients) is a descriptor designed to encode pedestrian structure. SVM (Support Vector Machine) is a non probabilistic binary linear classifier. The core works at a single scale, i.e. the classifier is trained to recognize pedestrian at a fixed size. Extension to multiple scales is given by inserting the core in a framework that provides it with a sequence of re-scaled versions of the same input frame. In this way it is possible to detect pedestrians moving in an arbitrary range of distance.

Click to see the Demo Video of Pedestrian Detection.
embedded Vision Systems
The logiPDET core is sourced from Technology Partner
eVS embedded Vision Systems Srl.

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