IP Cores - logiBMP

Bitmap 2.5D Graphics Accelerator

Key Features

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  • Supports fast graphics operations with bitmaps
  • 2.5D option enables perspective correct texture rendering in 3D
  • Solid fill - Rectangle or Triangle rendering with any color
  • Triangle rendering with texturing; used for bitmap transformation or scaling
  • Texture swizzling storage operation
  • Supports two filtering methods: bi-linear interpolation and point sampling (the nearest neighbor interpolation)
  • Supports 32bpp (TrueColor with Alpha channel)
  • Configurable system bus: ARM® AMBA AXI4, CoreConnect or Xylon XMB
  • Available IP versions for AMD ISE and Vivado Design Suites

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Get free logicBRICKS reference designs and evaluate this IP core on the AMD Zynq™ 7000 All Programmable SoC based ZC702 Evaluation Board or the ZedBoard from Avnet Electronics Marketing.


The logiBMP is 2.5D graphics accelerator from Xylon logicBRICKS IP library, optimized for AMD FPGAs and designed to speed up graphics operations with bitmaps. This IP core significantly speeds up GUI rendering. The logiBMP supports very complex bitmap operations like texture renderings, picture filtering, up and down scaling, and bitmap rotating. The core is fully embedded into the AMD Platfrom Studio and EDK tools, and its integration with on-chip AMBA AXI4 or CoreConnect PLB/OPB bus is very simple. Parametrizable VHDL design allows tuning of slice consumption and features set through an easy-to-use GUI interface. The logiBMP enables perspective correct texture renderings of 2.5D graphics scenes. The IP core can be easily integrated with other logicBRICKS, i.e. logiCVC Compact Multilayered Video Controller and the logiBITBLT 2D graphics accelerator to support smooth graphics transition and animations.
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