IP Cores - logiHDR

High Dynamic Range (HDR) Pipeline

Key Features

  • Digitally processes and enhances raw image data from HDR camera sensors
  • Supports AMD Zynq 7000 AP SoC, Series 7 and newer FPGA device families
  • Complete and configurable HDR pipeline includes:
  • - Multiple Exposure Merge, supporting two or three exposures
    - Dynamic Range Compression

    - Brightness Enhancement
  • Supports UHD 4K2Kp60 and resolutions up to 7680x7680 at lower refresh rates
  • Parallel pixel processing per clock: 1, 2, or 4 pixels
  • Video input formats: RGB 8/10/12/14-bit per color
  • Video output formats: RGB 8/10/12-bit per color
  • Video Input and output are ARM® AMBA® AXI4-Stream protocol compliant
  • Optional registers are AMBA AXI4-Lite protocol compliant
  • Available for AMD Vivado™ IP Integrator


The logiHDR is an Ultra High Definition (UHD) HDR pipeline designed for digital processing and image quality enhancements of the raw image data from HDR sensors. The logiHDR extracts the maximum detail from high-contrast scenes, i.e. scenes with objects highlighted by a direct sunlight and objects placed in extreme shades. The IP core accepts RGB-formatted video inputs with different color depths and merges different exposures into a single HDR image, dynamically enhances the luminance range, and enhances brightness in local areas. The logiHDR can be easily combined with the logiISP Image Signal Processing (ISP) IP core in flexible and configurable video pipelines with advanced processing capabilities.

The logiHDR High Dynamic Range (HDR) Pipeline IP core is prepackaged for the AMD Vivado™ IP Integrator (IPI) tool, requires no skills beyond general tools knowledge and can be used in same ways as AMD IP cores.
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