MPSoC Vision Development Kit
- Complete and flexible design platforms for embedded multi-camera vision applications
- Available kit versions with GMSL2 and FPD-Link III automotive serial interfaces
- Enables vision developers to quickly add their own algorithms in the provided infrastructure
- Based on AMD Zynq™ UltraScale+™ MPSoC
- Includes two different licensed reference MPSoC designs, both with an integrated video processing block example for video capture and display of four CAM inputs:
- logiADAK-VDF-ZU Video Design Framework (FPD-Link III and GMSL2)
- logiREF-DFX-IDF Dynamic Function eXchange Design Framework (GMSL2 only),
- Resolutions:1928x1080 Input and 1920x1080 Output
- Designs prepared for the AMD Vivado™ Design Suite and AMD Vitis™ Unified Software Platform
- Runs on Linux OS and includes logicBRICKS software drivers and demo applications
- Complete hardware platform includes:
- 1x AMD ZCU102 Evaluation Kit
- 1x Xylon GMSL2 or FPD-Link III 12-Ch Video FMC board
- 4x Xylon 2.3-Mpix HDR video camera systems and Cable
- 2x Rosenberger® HFM® to 4x FAKRA cable assembly
- Power Supply
- Documentation and tech support (e-mail)
The logiVID-ZU Vision Development Kits provide system designers with everything they need to efficiently develop multi-camera vision applications on the AMD Zynq™ UltraScale+™ MPSoC. The complete hardware platforms includes four Xylon 2.3 MP HDR video cameras and supports HDMI video output. The provided 2.3 MP HDR cameras support either the GMSL2 high-speed digital video interface from Maxim Integrated, or the FPD-Link III interface from Texas Instruments.
Kit deliverables include the complete and licensed logiADAK-VDF-ZU Video Design Framework and logiREF-DFX-IDF Design Framework, with pre-verified reference designs implemented by logicBRICKS IP cores. All IP cores are supplied with bare-metal and appropriate Linux software drivers. The reference designs are prepared for the AMD Vivado™ Design Suite and the AMD Vitis™ Unified Software Platform.
The complete camera-to-display SoC logiADAK-VDF-ZU designs use just a fraction of available programmable logic and significantly save the design time. Instead of starting from scratch and having to spend months designing and building a new design framework, logiVID-ZU users can immediately focus on specific vision-based parts of their next SoC design.
The logiREF-DFX-IDF Design Framework brings the complete design framework to explain and demonstrate the AMD Dynamic Function eXchange (DFX). DFX enables features swapping by reconfiguring parts of a continually operating programmable FPGA/SoC chip. Designed through the Isolation Design Flow (IDF), the fault-tolerant chip design showcases functional safety methodologies for safety-critical applications.